Solar cells, normally to be operational, have very shallow PN junctions so that they may capture the blue end of the photo spectrum. Typically, the PN junction lies approximately 0.3 micrometers beneath the surface of the silicon semiconductor wafer. If, during the normal processing which occurs in the manufacture of solar cells subsequent to formation of the PN junction, the surface of the wafer in which the PN junction is formed is maltreated, the junction can be destroyed and the cell can become useless.
In forming the junction, the silicon semiconductor wafer is exposed at appropriate temperatures to a source of doping material selected to provide the desired PN junction. For example, in a boron doped, silicon semiconductor wafer which is a P conductivity type wafer, a layer of phosphorous pentoxide glass is deposited over the entire surface of the wafer through chemical vapor deposition by flowing phosphorus oxychloride and oxygen into the diffusion chamber using a carrier gas of dry nitrogen. The phosphorous pentoxide glass provides sufficient phosphorous atoms to diffuse from the glass into the silicon surface in accordance with well known diffusion characteristics to provide the desired shallow PN junction.
To form an operative solar cell, however, the layer of phosphorous pentoxide glass and the diffused N type layer of silicon must be removed from the silicon wafer except for one surface thereof so that appropriate contacts can be made to the wafer.
In the prior art, this undesired phosphorous pentoxide glass layer and the converted N type layer of silicon have been removed by acid etching utilizing a mixture of nitric acid and hydrofluoric acid. To protect the surface of the cell having the desired shallow junction therein, it has been customary to affix a mask, such as an acid etch resist mask, thereto. It has been found that the acid etch often penetrates pin holes or other irregularities in the mask, thus attacking the silicon wafer therebeneath and damaging portions of the junction. In the event the etch resist mask is effective to preclude undesirable etching, it must thereafter be removed with an appropriate solvent.
In an attempt to avoid the utilization of the etch resist mask, wafers have been affixed to a tape carrier having a proper adhesive on the surface thereof with the surface of the wafer to be protected affixed to the adhesive. Such obviously depends on the quality of the tape adhesive and furthermore, the tape in such systems can normally be used only once, thus injecting into the system an additional expense.
Irrespective of the type of masking technique which is utilized, the acid etch causes an exothermic reaction with silicon, thus creating heat which increases the temperature of the silicon wafer. As the temperature of the silicon wafer increases, the reaction rate between the acid etch and the silicon wafer also increases. Such phenomena obviously introduces parameters which must be carefully controlled to preclude a runaway etch from occurring.
In any acid etching technique there are severe problems relating to the undercutting of the silicon wafer by the acid etch. Those portions of the wafer immediately beneath the mask tend to be eaten away by the etch and undercut, thus tending to destroy the integrity of the junction and further providing access areas for the etch to reach across the surface of the wafer.
In an attempt to solve the foregoing problems a water jig etching technique was developed. Under this technique a water jet is caused to flow on the side of the wafer which is to be protected from the etch. The wet acid etch is applied then to the remainder of the wafer from which the glass and the converted silicon is to be removed. The water jet appears to preclude the etch from flowing around to the undesired portion of the wafer and also cools the wafer to thus control the etch rate. This system, however, requires a continuous water flow and a requirement to control the drainage of the resulting water-acid mixture.
In any of the systems utilizing the acid etch there is a requirement that the wafer be water rinsed and dried subsequent to the etching before any additional operations upon the wafer may be accomplished.
Plasma etching was introduced to overcome some of the foregoing difficulties. Plasma etching is, at this time, well known in the semiconductor processing art and is described in various publications. For example, U.S. Pat. No. 3,795,557 for PROCESS AND MATERIAL FOR MANUFACTURING SEMICONDUCTOR DEVICES, issued Mar. 5, 1974 which is incorporated herein by reference.
Plasma etching, though quite successful when properly controlled, nonetheless still introduced a number of problems. It was extremely difficult to obtain a cross-wafer uniformity, that is the nature and extent of the etching between two points on the same wafer was not always the same. In addition thereto, there were differences in the etching between two wafers in the same run of a plasma etching process. It was also found that differences occurred between two wafers which were run in different runs of the same etching process. It was determined that some of the causes for this non-uniformity in etching occurred as a result of variations in local temperature on the surface of the wafer during etching. The peculiar nature of the plasma etching process caused the elements which accomplished the etching to concentrate their energy on the wafer's periphery, thus overheating it. The overheating then in turn enhanced the etching, thus causing the peripheral regions of the wafer to become severely over-etched before the desired etching could be achieved along the surface of the wafer and particularly at the center thereof. To eliminate this difficulty, various steps have been taken in the plasma etching arts. These are to remove the wafers from the active plasma region, to limit the pressure of the plasma to less than 1 Torr, to lay the wafers on a conductive backing plate larger than the wafer itself or to place the wafers in a perforated metal cylinder during etching to shield the wafers from ions, radiation and electric fields, thus allowing only the free radicals to enter and contact the wafers.
Even though the plasma etching is a dry process, according to the prior art there is a requirement for a masking technique of some type to obtain the desired etching, particularly since the wafers are placed within the reaction chamber of the plasma etching apparatus, thus being fully exposed to the etchant contained therein. Thus one of the features causing wet etching to be undesirable is carried over to the plasma etching process as well.